How this works
Uses freq = Fclk / ((PSC+1) × (ARR+1)), searching PSC from 0 upward for the first value where ARR fits in 16 bits (0–65535) and error is minimized. This matches the standard STM32 general-purpose timer model; check your specific MCU's register widths (some timers are 32-bit) if this doesn't match your part.